Power Engineer

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APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Model power dissipation and power delivery. Establish voltages for DVFM states of IPs, including Neural Engines, CPUs, Graphics, Computer (AI/ML) accelerators, media IPs, caches and fabric.

Model power dissipation for customer use-cases. Interact with the Technology team, Silicon Validation, and Product Engineering teams to establish voltage-frequency design points pre- and post- silicon. Work with the power lab and test teams to correlate models to HW data.

40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role.

The base pay range for this role is between $207,673 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.

PAY & BENEFITS

• Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs.
• Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan.

You’ll also receive benefits including

• Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition.
• Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.
• Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.

Note

Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Master’s or foreign equivalent in Electrical Engineering and Computer Engineering, Computer Science, or related field and 2 years of experience in the job offered or a related occupation.

Experience and/or education must include

Using VLSI design flow, CMOS technology and transistor aging Modeling power dissipation Data analysis and scripting using programming languages such as Python, MATLAB or C/C++ Using industry-standard EDA tools for power analysis, such as Cadence Voltus, Synopsys PrimePower/PowerArtist, Siemens mPower, or similar tool, as well as performing RTL design, synthesis, and physical implementation Understanding of electrical properties of on-die PDN, power gating, package and system power delivery Working with voltage regulators and voltage drops across power delivery networks

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