SoC Power Flow Methodology Engineer

Are you passionate about crafting solutions to intricate challenges? Join the Low Power group at Silicon Technologies and contribute to the development of cutting-edge technology and capabilities for low-power chip design. Your work will fuel Apple’s next-generation chips!

Responsible for developing and improving low-power flow algorithms using AI and machine learning, which significantly impacts the work of many designers involved in mobile system-on- chips.

In this role, you’ll develop innovative automated tools and capabilities for the Silicon Engineering Power team. Your contributions will enable the creation of chips with unprecedented power efficiency. You’ll be involved in the architecture, implementation, and validation of advanced low-power design and verification workflows.

Additionally, you’ll shape low-power strategies for emerging technologies. Your responsibilities will encompass the development of flows and tools for power analysis, optimization, and verification, seamlessly integrated into stages such as RTL development/ verification, synthesis, or place-and-route (P&R). You’ll actively leverage various AI tools to innovate new solutions and enhance existing ones.

Additionally, you’ll collaborate with design teams to address queries, resolve issues, and ensure the smooth adoption of these methodologies.

A minimum of a bachelor's degree in relevant field and a minimum of 3 years of relevant industry experience

Solid grasp of VLSI designs and SOC design processes. Enthusiasm for scripting and leveraging low-power expertise to innovate software solutions. Enthusiasm for leveraging AI/ML to innovate low-power methodologies and flows.

Experience in flow development and algorithm design using Python/Perl/TCL. Demonstrated proficiency in contemporary software testing and development methodologies. Familiarity with low-power principles (e.g., low-power design techniques) is advantageous.