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ASIC Design and Integration Engineer

Apple · Cupertino, United States of America · Beaverton, United States of America

Spotted 118d ago

Job details

Level
Senior
Experience
8+ years
Posted
Apr 10, 2026
Last confirmed open
Oct 28, 2026

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Company-specific questions

  • Have you previously worked at Apple?
Job description

About this role

Apple’s Silicon Engineering team is looking for a highly skilled and motivated ASIC Design Engineer to join our dynamic group. In this role, you will develop custom SoCs that drive the performance and efficiency of Apple’s products. You will work on cutting-edge technologies and collaborate with cross-functional teams to deliver groundbreaking solutions.

Design and Development

Design, implementation, and verification of complex ASICs. Develop RTL using SystemVerilog and perform synthesis.

Verification

Engage with simulation-based and formal verification teams to ensure robust design validation.

Integration and Testing

Collaborate with hardware and software teams to integrate digital designs into complex SoCs.

Timing and Power Analysis

Conduct timing analysis and power optimization to achieve PPA goals.

Documentation and Reporting

Create detailed micro-architecture and design documentation.

Minimum of BS + 10 years relevant industry experience

Experience: 8+ years of proven experience in ASIC design, including RTL design and verification. Hands-on experience with ASIC design tools and methodologies is essential.

Technical Skills

Proficiency in SystemVerilog, RTL design, synthesis, and timing analysis.

Problem-Solving

Strong analytical and problem-solving skills.

Collaboration

Excellent communication and teamwork skills, work effectively in cross-functional teams.

Attention to Detail

Meticulous attention to detail and a commitment to delivering high-quality designs. Experience with high-speed I/O design and protocols. Knowledge of PCIe is a plus.

Familiarity with custom ASIC design and FPGA prototyping. Hands on experience in all aspects of front-end chip development process (e.g., CDC/RDC, LINT, LEC, etc.). Knowledge of low-power design techniques and power optimization strategies.

Interested in this role?Continue on Apple's careers page.
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